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TEF6730A
Front-end for digital-IF car radio
Rev. 01 -- 21 February 2007 Product data sheet
1. General description
The TEF6730A is a car radio tuner front-end for digital-IF reception, especially designed for co-operation with digital-IF DSP back-ends of the SAF773x and SAF778x families. The FM tuner features single conversion to IF = 10.7 MHz and integrated image rejection; capable for FM 65 MHz to 108 MHz and weather band reception. The AM tuner features single conversion to IF = 10.7 MHz with an integrated AM front-end, capable for LW, MW and full SW reception. A combined AM/FM IF AGC amplifier provides a suitable IF signal to the ADC in IF DSP. The device can be controlled via the fast-mode I2C-bus (400 kHz) and includes autonomous tuning functions for easy control. No manual alignments are required.
2. Features
I FM mixer for conversion of FM RF to IF 10.7 MHz with large dynamic range, high image rejection and selectable mixer gain I Selectable high or low injection of LO I AGC PIN diode drive circuit for FM RF AGC with detection at RF and IF, including keyed AGC function I RF input for weather band applications I Integrated AM front-end LNA I Integrated AM RF AGC for low desensitization and AGC PIN diode drive circuit with detection at RF and IF I AM mixer for conversion of AM RF to IF 10.7 MHz I AM/FM IF AGC amplifier with large dynamic range, gain controlled from IF DSP I AM and FM front-end AGC information is available via the I2C-bus I Low phase noise local oscillator with reliable start-up behavior I In-lock detection for optimized adaptive PLL tuning speed I Programmable divider and mixer dividers for reception of FM (65 MHz to 108 MHz), weather band, AM LW, MW and full SW I Two antenna DAAs I Sequential state machine supporting all tuning actions including AFU for RDS I Interfacing signals for IF AGC, FM keyed AGC, AFU and reference frequency to IF DSP for optimum system performance I Software controlled flag outputs I Selection of four I2C-bus addresses I Qualified in accordance with AEC-Q100
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
3. Quick reference data
Table 1. Quick reference data VCCA = 8.5 V; Tamb = 25 C; see Figure 25; all AC values are given in RMS; unless otherwise specified. Symbol VCCA Parameter analog supply voltage Conditions on pins VCC, VCC(PLL), VCC(VCO), VCC(RF), VCC(IF), FMMIXOUT1, FMMIXOUT2, AMMIXOUT1 and AMMIXOUT2 Min 8 Typ 8.5 Max 9 Unit V Supply voltage
Current in FM mode ICC(tot) ICC(tot) total supply current total supply current 85.3 114.7 mA mA Current in AM mode Antenna Digital Auto Alignment (DAA) DAA1: pin DAAOUT1[1] Gconv(DAA) DAA conversion gain DAA2: pin DAAOUT2[2] 0.7 1.35 Gconv(DAA) DAA conversion gain Reference frequency External reference frequency, circuit inputs: pins FREF1 and FREF2 fext external frequency 100 kHz Tuning system; see Table 28, Table 29, Table 30 and Table 31 Voltage controlled oscillator fVCO(min) fVCO(max) C/N Timings ttune tuning time Europe FM and US FM band; fref = 100 kHz; fRF = 87.5 MHz to 108 MHz AM MW band; fref = 20 kHz; fRF = 0.53 MHz to 1.7 MHz tupd(AF) AF update time cycle time for inaudible AF update including 1 ms mute start and 1 ms mute release time LW MW SW fIF Vsens IF frequency sensitivity voltage (S+N)/N = 26 dB 0.75 1 ms minimum VCO frequency application according to Figure 25 maximum VCO frequency carrier-to-noise ratio fVCO = 200 MHz; f = 10 kHz; Q = 30
[3] [3] [3]
0.1
-
2
256 94
98
130 159.9 -
MHz MHz MHz dBc/Hz
-
6
10 6.5
ms ms
AM overall system parameters[4] fi(RF) RF input frequency 144 522 2.3 10.7 50 288 1710 26.1 kHz kHz MHz MHz V
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Product data sheet
Rev. 01 -- 21 February 2007
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NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
Table 1. Quick reference data ...continued VCCA = 8.5 V; Tamb = 25 C; see Figure 25; all AC values are given in RMS; unless otherwise specified. Symbol Vi(RF) Parameter RF input voltage Conditions start level of wideband AGC data byte AGC bits WBAGC[1:0] = 00 data byte AGC bits WBAGC[1:0] = 01 data byte AGC bits WBAGC[1:0] = 10 data byte AGC bits WBAGC[1:0] = 11 Vi(RF)M peak RF input voltage start level of narrow-band AGC; m = 0 data byte AGC bits NBAGC[1:0] = 00 data byte AGC bits NBAGC[1:0] = 01 data byte AGC bits NBAGC[1:0] = 10 data byte AGC bits NBAGC[1:0] = 11 IP2 IP3 second-order intercept point referenced to receiver input third-order intercept point referenced to receiver input f = 40 kHz f = 100 kHz ripple ripple rejection VCC(ripple) / Vaudio; fripple = 100 Hz; VCC(ripple) = 10 mV (RMS); Vi(RF) = 1 mV to 1 V FM standard weather band fIF Vsens IF frequency sensitivity voltage BIF = 170 kHz threshold extension enabled; weak signal handling enabled (SAF7730 N231) Vi(RF) RF input voltage start level of wideband AGC data byte AGC bits WBAGC[1:0] = 00 data byte AGC bits WBAGC[1:0] = 01 data byte AGC bits WBAGC[1:0] = 10 data byte AGC bits WBAGC[1:0] = 11 Vi(RF)M peak RF input voltage start level of narrow-band AGC; m = 0 data byte AGC bits NBAGC[1:0] = 00 data byte AGC bits NBAGC[1:0] = 01 data byte AGC bits NBAGC[1:0] = 10 data byte AGC bits NBAGC[1:0] = 11 IP3 ripple third-order intercept point ripple rejection f = 400 kHz VCC(ripple) / Vaudio; fripple = 100 Hz; VCC(ripple) = 10 mV (RMS); Vi(RF) = 500 V 17 14 11 9 123 64 mV mV mV mV dBV dB 19 14 10 7 mV mV mV mV 130 133 40 dBV dBV dB 200 170 140 115 152 mV mV mV mV dBV 125 100 75 35 mV mV mV mV Min Typ Max Unit
FM overall system parameters[5] fi(RF) RF input frequency 65 162.4 10.7 2 1.1 108 MHz MHz V V 162.55 MHz
[1] Conversion gain formula of DAA1: V DAAOUT 1 = 1.915 x -------- + 0.1 x V tune where n = 0 to 127. 128
-
-
n
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Product data sheet
Rev. 01 -- 21 February 2007
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NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
n
[2] [3] [4] [5]
Conversion gain formula of DAA2: V DAAOUT 2 = 0.693 x ----- + 0.7 x V DAAOUT 1 where n = 0 to 15. 16 The VCO frequency is determined by the external circuit at pins OSCFDB and OSCTNK. Based on 15 pF/60 pF dummy aerial, voltages at dummy aerial input, fmod = 400 Hz, 2.5 kHz audio bandwidth, fi(RF) = 990 kHz, m = 0.3 and nominal maximum IF AGC gain, unless otherwise specified. Based on 75 dummy aerial, voltages at dummy aerial input, fmod = 400 Hz, de-emphasis = 50 s, fi(RF) = 97.1 MHz, f = 22.5 kHz, nominal mixer gain and nominal maximum IF AGC gain, unless otherwise specified.
4. Ordering information
Table 2. Ordering information Package Name TEF6730AHW HTQFP64 Description plastic thermal enhanced thin quad flat package; 64 leads; body 10 x 10 x 1 mm; exposed die pad Version SOT855-1 Type number
TEF6730A_1
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Product data sheet
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Product data sheet Rev. 01 -- 21 February 2007
(c) NXP B.V. 2007. All rights reserved. TEF6730A_1
5. Block diagram
NXP Semiconductors
VCOGND
VCC(VCO)
VCC(PLL)
FREF1
FREF2
DGND
FGND
VREF
GND
VCC
37 OSCTNK 40 pll 39
38 vco
41 vco
53
54
55 vref
56 sup
57 sup
45 fgnd
52 dig
i.c. flag 42 SWPORT
OSCFDB
PLL /N CPOUT VTUNE 36 35
REF fref
BAND /M pll in-lock TUNING STATE MACHINE
i.c. 16, 18, 48, 49
43 44
AFSAMPLE AFHOLD
DAAOUT2 DAAOUT1 WXMIXDEC WXMIXIN FMMIXIN2 FMMIXIN1
33 32 29 28 27 26
antenna DAA tuner control
CTRL
BUF write
46 address 47
ADDR2 ADDR1
I2C-BUS
50 51
TEF6730AHW
MIXER WX MIXER ifagc FM ifagc MIXER am/fm rf agc IF AGC FM RF AGC rf 34 KAGC 31 TFMAGC 25 RFGND 24 IAMAGC 23 PINAGCDEC 22 TAMAGC 21 AMMIXIN AM RF AGC lna 20 19 17 AMMIXDEC LNAOUT LNAAGCDEC 15 AGCCNTRL AM LNA 90 90 read
SDA SCL
58 59 60 61
IFMAGC
30
IFOUT1 IFOUT2 IFAGCMSB IFAGCLSB
Front-end for digital-IF car radio
lna rf 14 13 12 11 10 9 FMMIXOUT2 AMMIXOUT2 VCC(RF) AMMIXOUT1 LNAIN V50LNA 8 FMMIXOUT1 7 CFSW2 6 CFSW1 5 SWDEC 4 IFAGCDEC 3 FMIFAGCIN2 2 FMIFAGCIN1 1 AMIFAGCIN 64 IFAGCBIAS
ifagc 63 IFGND 62 VCC(IF)
TEF6730A
008aaa057
5 of 58
Fig 1. Block diagram of TEF6730AHW
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
6. Pinning information
6.1 Pinning
64 IFAGCBIAS 60 IFAGCMSB 62 VCC(IF) 61 IFAGCLSB
59 IFOUT2
58 IFOUT1
54 FREF2
53 FREF1
63 IFGND
52 DGND
55 VREF
57 VCC 56 GND
50 SDA
51 SCL
AMIFAGCIN FMIFAGCIN1 FMIFAGCIN2 IFAGCDEC SWDEC CFSW1 CFSW2 FMMIXOUT1 AMMIXOUT2
1 2 3 4 5 6 7 8 9
49 i.c.
48 i.c. 47 ADDR1 46 ADDR2 45 FGND 44 AFHOLD 43 AFSAMPLE 42 SWPORT 41 VCC(VCO) 40 OSCTNK 39 OSCFDB 38 VCOGND 37 VCC(PLL) 36 CPOUT 35 VTUNE 34 KAGC 33 DAAOUT2
TEF6730AHW
FMMIXOUT2 10 AMMIXOUT1 11 VCC(RF) 12 V50LNA 13 LNAIN 14 AGCCNTRL 15 i.c. 16
LNAOUT 17
i.c. 18
LNAAGCDEC 19
AMMIXDEC 20
AMMIXIN 21
TAMAGC 22
PINAGCDEC 23
IAMAGC 24
RFGND 25
FMMIXIN1 26
FMMIXIN2 27
WXMIXIN 28
WXMIXDEC 29
IFMAGC 30
TFMAGC 31
DAAOUT1 32
008aaa058
Fig 2. Pin configuration for HTQFP64
6.2 Pin description
Table 3. Symbol AMIFAGCIN FMIFAGCIN1 FMIFAGCIN2 IFAGCDEC SWDEC CFSW1 CFSW2 FMMIXOUT1 AMMIXOUT2
TEF6730A_1
Pin description Pin 1 2 3 4 5 6 7 8 9 Description IF AGC amplifier AM input (10.7 MHz) IF AGC amplifier FM input 1 (10.7 MHz) IF AGC amplifier FM input 2 (10.7 MHz) IF AGC amplifier AM and FM decoupling ceramic filter switch decoupling ceramic filter switch 1 ceramic filter switch 2 FM mixer IF output 1 (10.7 MHz) AM mixer IF output 2 (10.7 MHz)
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Product data sheet
Rev. 01 -- 21 February 2007
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NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
Pin description ...continued Pin 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 Description FM mixer IF output 2 (10.7 MHz) AM mixer IF output 1 (10.7 MHz) AM/FM RF supply voltage AM LNA supply voltage decoupling AM LNA input AM LNA AGC pin internally connected; leave open AM LNA output internally connected; leave open AM LNA AGC decoupling AM mixer decoupling AM mixer input AM RF AGC time constant AM PIN diode AGC decoupling AGC current for AM PIN diode RF ground FM mixer input 1 FM mixer input 2 weather band mixer input weather band mixer decoupling AGC current for FM PIN diode FM RF AGC time constant antenna DAA output 1 antenna DAA output 2 level input for FM keyed AGC function tuning voltage input antenna DAA charge pump output tuning PLL supply voltage VCO ground VCO feedback VCO tank circuit VCO supply voltage software controllable port output AF sample flag output AF hold flag output and input reference frequency ground address select input 2 address select input 1 internally connected; leave open internally connected; leave open I2C-bus data line input and output
(c) NXP B.V. 2007. All rights reserved.
Table 3. Symbol
FMMIXOUT2 AMMIXOUT1 VCC(RF) V50LNA LNAIN AGCCNTRL i.c. LNAOUT i.c. LNAAGCDEC AMMIXDEC AMMIXIN TAMAGC PINAGCDEC IAMAGC RFGND FMMIXIN1 FMMIXIN2 WXMIXIN WXMIXDEC IFMAGC TFMAGC DAAOUT1 DAAOUT2 KAGC VTUNE CPOUT VCC(PLL) VCOGND OSCFDB OSCTNK VCC(VCO) SWPORT AFSAMPLE AFHOLD FGND ADDR2 ADDR1 i.c. i.c. SDA
TEF6730A_1
Product data sheet
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NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
Pin description ...continued Pin 51 52 53 54 55 56 57 58 59 60 61 62 63 64 Description I2C-bus clock line input digital ground reference frequency input 1 reference frequency input 2 reference voltage noise decoupling ground supply voltage (8.5 V) IF AGC amplifier output 1 IF AGC amplifier output 2 MSB input for IF AGC amplifier gain setting LSB input for IF AGC amplifier gain setting IF AGC amplifier supply voltage IF AGC amplifier ground bias voltage decoupling for IF AGC amplifier
Table 3. Symbol SCL DGND FREF1 FREF2 VREF GND VCC IFOUT1 IFOUT2
IFAGCMSB IFAGCLSB VCC(IF) IFGND IFAGCBIAS
7. Functional description
7.1 FM mixer 1
The FM quadrature mixer converts FM RF (65 MHz to 108 MHz) to an IF frequency of 10.7 MHz. The FM mixer provides high image rejection, a large dynamic range and selectable mixer gain. The image rejection can be selected between low injection of LO and high injection of LO via the I2C-bus independently of the band selection. A separate RF input for weather band is available.
7.2 FM RF AGC
AGC detection is at the FM front-end mixer input and the AM/FM IF AGC amplifier input, both with programmable AGC thresholds. When the threshold is exceeded, the PIN diode drive circuit sources a current to an external PIN diode circuit, keeping the RF signal level constant. Keyed AGC function is selectable via the I2C-bus and uses the in-band level information from the IF DSP. The AGC PIN diode drive circuit can optionally deliver a fixed current as a local function. In AM mode, the AGC PIN diode drive circuit can be set to generate a fixed source current into the external FM PIN diode circuitry.
7.3 Antenna DAA1 and DAA2
The antenna DAA1 measures the VCO tuning voltage and multiplies it with a factor defined by the 7-bit DAA1 setting to generate a tuning voltage for the FM antenna tank circuit. If a second FM tank circuit is applied, the tuning voltage can be derived from the antenna DAA2 output. The antenna DAA2 measures the output voltage of the antenna DAA1 and multiplies it with a factor defined by the 4-bit DAA2 setting.
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Product data sheet
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TEF6730A
Front-end for digital-IF car radio
7.4 AM LNA
The AM low noise amplifier is fully integrated.
7.5 AM RF AGC
The AM RF AGC is partially integrated. Detection is at the output of the AM LNA and at the input of the AM/FM IF AGC amplifier, both with programmable thresholds. First the integrated AGC reduces the gain of the LNA. After the LNA AGC, the PIN diode AGC takes over by sinking a current via an external PIN diode. In FM mode, the AM AGC can be set to a fixed attenuation.
7.6 AM mixer
The large dynamic range AM mixer converts AM RF (144 kHz to 26.1 MHz) to an IF frequency of 10.7 MHz.
7.7 VCO and dividers
The varactor tuned LC oscillator together with the dividers provides the LO signal for both AM and FM front-end mixers. The VCO has an operating frequency of approximately 160 MHz to 256 MHz. In FM mode the LO frequency is divided by 2 or 3. These dividers generate in-phase and quadrature-phase output signals used in the FM front-end mixer for image rejection. In weather band mode the LO signal is directly phase shifted to generate the in-phase and quadrature-phase signals. In AM mode the LO frequency is divided by 6, 8, 10, 16 or 20 depending on the selected AM band.
7.8 Tuning PLL
The tuning PLL locks the VCO frequency divided by the programmable divider ratio to the reference frequency. Due to the combination of different charge pump signals in the PLL loop filter, the loop parameters are adapted dynamically. Tuning to different RF frequencies is done by changing the programmable divider ratio. The tuning step size is selected with the reference frequency divider setting.
7.9 AM/FM IF AGC amplifier
The combined AM/FM IF AGC amplifier delivers a suitable IF signal for the ADC in the IF DSP. The maximum gain of the IF AGC amplifier can be selected via the I2C-bus. The gain of this amplifier is automatically adapted via interfacing signals from the IF DSP. The IF AGC amplifier has three signal inputs, two for FM and one for AM. This allows the application of multiple external filters, e.g. with different bandwidths.
8. I2C-bus protocol
S
SLAVE ADDRESS W
ACK-s
MSA
ACK-s
DATA data transferred (n bytes + acknowledge)
ACK-s
P
001aad051
Fig 3. Write mode
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Product data sheet
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NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
S
SLAVE ADDRESS R
ACK-s
DATA
ACK-m
DATA
NA
P
data transferred (n - 1 bytes + acknowledge)
001aad049
Fig 4. Read mode Table 4. Code S Slave address W Description of I2C-bus format Description START condition 1100 0000b for pin ADDR2 and pin ADDR1 grounded 1100 0010b for pin ADDR2 grounded and pin ADDR1 floating 1100 0100b for pin ADDR2 floating and pin ADDR1 grounded 1100 0110b for pin ADDR2 and pin ADDR1 floating Slave address R 1100 0001b for pin ADDR2 and pin ADDR1 grounded 1100 0011b for pin ADDR2 grounded and pin ADDR1 floating 1100 0101b for pin ADDR2 floating and pin ADDR1 grounded 1100 0111b for pin ADDR2 and pin ADDR1 floating ACK-s ACK-m NA MSA Data P acknowledge generated by the slave acknowledge generated by the master not acknowledge mode and subaddress byte data byte STOP condition
8.1 Read mode
Read data is loaded into the I2C-bus register at the preceding acknowledge clock pulse.
Table 5. Data byte 0h 1h Read register overview Name TUNER ID Reference Section 8.1.1 Section 8.1.2
8.1.1 Read mode: data byte TUNER
Table 6. 7 RAGC1 TUNER - data byte 0h bit allocation 6 RAGC0 5 TAS1 4 TAS0 3 2 1 0 POR
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Product data sheet
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TEF6730A
Front-end for digital-IF car radio
TUNER - data byte 0h bit description Symbol RAGC[1:0] Description RF AGC attenuation indicator AM mode, PIN diode current on pin IAMAGC: 00 = no AGC 01 = LNA AGC 10 = IAGC < 1 mA 11 = IAGC > 1 mA FM mode, PIN diode current on pin IFMAGC: 00 = < 0.1 mA 01 = 0.1 mA to 0.5 mA 10 = 0.5 mA to 2.5 mA 11 = > 2.5 mA
Table 7. Bit 7 and 6
5 and 4
TAS[1:0]
tuning action state; the signal TAS informs about internal control functions of the tuner action state machine; this way the progress of tuner actions can be monitored by the microcontroller; see Figure 8 to Figure 18 00 = no current action 01 = mute started and in progress at DSP 10 = PLL tuning in progress and mute activated at DSP 11 = PLL tuning ready and mute activated at DSP
3 to 1 0
POR
not used power-on reset 0 = normal operation 1 = I2C-bus data is reset to default POR state; POR is reset to logic 0 after the TEF6730A has been read out and written to via I2C-bus at least once
8.1.2 Read mode: data byte ID
Table 8. 7 Table 9. Bit 7 to 3 2 to 0 ID - data byte 1h bit allocation 6 5 4 3 2 ID2 1 ID1 0 ID0
ID - data byte 1h bit description Symbol ID[2:0] Description not used device type identification 110 = TEF6730A
8.2 Write mode
The tuner is controlled by the I2C-bus. After the IC address the MSA byte contains the control of the tuning action via the bits MODE[2:0] and REGC and subaddressing via bits SA[3:0] (see Figure 5).
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Product data sheet
Rev. 01 -- 21 February 2007
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NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
The tuner circuit is controlled by the CONTROL register. Any data change in the CONTROL register has immediate effect and will change the operation of the tuner circuit accordingly. Transmitted I2C-bus data is not loaded into the CONTROL register directly but loaded into a BUFFER register instead. This allows the IC to take care of tuning actions freeing the microcontroller from cumbersome controls and timings. Controlled by a state machine, the BUFFER data will be loaded into the CONTROL register for new settings. However, at the same time the CONTROL data is loaded into the BUFFER register. This register swap action allows a fast return to the previous setting because the previous data remains available in the BUFFER register (see Figure 6 and Figure 7). Via MODE several operational modes can be selected for the state machine. MODE offers all standard tuning actions as well as generic control for flexibility. The state machine controls the tuner by controlling the internal I2C-bus data. Action progress is monitored by the accompanying IF DSP via the AFSAMPLE and AFHOLD lines. This way, functions like tuning mute and weak signal processing can be controlled complementary to the tuner action. The state machine operation starts at the end of transmission (P = STOP). In case a previous action is still active, this is ignored and the new action defined by MODE is started immediately. When only the address byte is transmitted, no action is started at all (device presence test). To minimize the I2C-bus transmission time, only bytes that include data changes need to be written. Following the MSA byte the transmission can start at any given data byte defined by the subaddress (SA) bits. Furthermore, when writing the buffered range either the current BUFFER data or the current CONTROL data can be used as default, controlled by the REGC bit:
* With REGC = 0, any BUFFER data that is not newly written via I2C-bus remains
unchanged. In general, the BUFFER register will contain the previous tuner setting, so this becomes default for the new setting. When only the MSA byte is transmitted defining a tuning MODE with REGC = 0, the tuner will return to its previous settings (see Figure 6).
* With REGC = 1, the BUFFER register is loaded with data from the CONTROL register
first. This way, not written BUFFER data equals the CONTROL data. Since the CONTROL register contains the current tuner setting with REGC = 1, the current tuner setting is default for the new setting. When a tuning MODE action is defined with REGC = 1, the tuner will keep its current settings (CONTROL = current) for all data that is not newly written during the transmission (see Figure 7). After power-on reset, all registers are in their default settings. The control signals for the IF DSP are set to AFSAMPLE = HIGH and AFHOLD = HIGH (i.e. mute state). Any action of the state machine will change this setting to a new one as defined by the bits MODE[2:0].
TEF6730A_1
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Product data sheet
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NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
Write mode subaddress overview Name CONTROL PLLM PLLL DAA AGC BAND TEST Default 0000 0100b 0000 1000b 0111 1110b 0100 0000b 1000 0000b 0010 0000b 0000 0000b Reference Section 8.2.2 Section 8.2.3 Section 8.2.4 Section 8.2.5 Section 8.2.6 Section 8.2.7 Section 8.2.8
Table 10. 0h 1h 2h 3h 4h 5h Fh
Subaddress
I2C-BUS
MODE MODE DECODER load STATE MACHINE
SA = 00h to 05h BUFFER REGISTER SA = 00h to 05h
AFSAMPLE AFHOLD
REGC = 1
swap
CONTROL REGISTER SA = 00h to 05h
TUNER CIRCUIT
001aae094
Fig 5. I2C-bus control
TEF6730A_1
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Product data sheet
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NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
MODE = load, REGC = 0, SA = 2 address BUFFER byte 0 MSA byte 2 byte 3 byte 4 byte 5 P current
previous
byte 1
previous
current
byte 2
previous
new
current
byte 3
previous
new
current
byte 4
previous
new
current
byte 5
previous
new
current
swap
CONTROL byte 0
current
previous
byte 1
current
previous
byte 2
current
new
byte 3
current
new
byte 4
current
new
byte 5
current
new
001aae095
Fig 6. Write to CONTROL register with swap, REGC = 0
TEF6730A_1
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Product data sheet
Rev. 01 -- 21 February 2007
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NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
MODE = load, REGC = 1, SA = 3 address BUFFER byte 0 MSA byte 3 current byte 4 byte 5 P current
previous
byte 1
previous
current
current
byte 2
previous
current
current
byte 3
previous
current
new
current
byte 4
previous
current
new
current
byte 5
previous
current
new
current
load
swap
CONTROL byte 0
current
current
byte 1
current
current
byte 2
current
current
byte 3
current
new
byte 4
current
new
byte 5
current
new
001aae096
Fig 7. Write to CONTROL register with swap, REGC = 1
TEF6730A_1
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Product data sheet
Rev. 01 -- 21 February 2007
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NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
8.2.1 Mode and subaddress byte for write
Table 11. 7 MODE2 Table 12. Bit 7 to 5 4 MSA - mode and subaddress byte bit allocation 6 MODE1 5 MODE0 4 REGC 3 SA3 2 SA2 1 SA1 0 SA0
MSA - mode and subaddress byte bit description Symbol MODE[2:0] REGC Description mode; see Table 13 register mode 0 = buffer mode or back mode: previous tuning data is default for new I2C-bus write (data of the BUFFER register is not changed before I2C-bus write); see Figure 6 1 = control mode or current mode: current tuning data is default for new I2C-bus write (the BUFFER register is loaded with CONTROL register data before I2C-bus write); see Figure 7
3 to 0
SA[3:0]
subaddress; write data byte subaddress 0 to 15. The subaddress value is auto-incremented and will revert from SA = 15 to SA = 0. The auto-increment function cannot be switched off.
Table 13. 0 0 0 0 0 0 1 1
Tuning action modes[1] Description[2] write BUFFER register, no state machine action, no swap tune to new program with 60 ms mute control; swap[3] ; see Figure 8 and Figure 9 tune to new program and stay muted (for release use end mode); swap[3] ; see Figure 10 and Figure 11 tune to AF program; check AF quality and tune back to main program; two swap operations[4]; see Figure 12 and Figure 13 tune to AF program in minimum time; swap; see Figure 14 and Figure 15 tune to AF program and stay muted (for release use end mode); swap; see Figure 16 and Figure 17 write CONTROL register via BUFFER; no state machine action; immediate swap; see Figure 6 and Figure 7 end action; release mute; no swap; see Figure 18 0 1 0 1 buffer preset search AF update
MODE2 MODE1 MODE0 Symbol
1 1 1
0 0 1
0 1 0
jump check load
1
[1]
1
1
end
When the write transmission of a state machine command starts during a mute state of the state machine, the sequences of the state machine start immediately with the actions which follow the mute period in the standard sequence (see Figure 9, Figure 11, Figure 13, Figure 15 and Figure 17). References to mute are only used for better understanding. Muting is performed in the IF DSP controlled by the tuner AFHOLD and AFSAMPLE lines. In the modes preset and search the AM AGC time constant is set to fast during the period of complete mute. The AF update sequence can also be started by pulling the AFHOLD pin LOW. In this case the AF information should be loaded into the BUFFER before. LOW period for a correct AF update timing: tLOW > 20 s. Between the end of the I2C-bus transmission and the falling edge of the AFHOLD pulse a delay of 20 s is necessary.
(c) NXP B.V. 2007. All rights reserved.
[2] [3] [4]
TEF6730A_1
Product data sheet
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NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
I2C-bus
P 1 ms PLL 60 ms
time
tuning
f1
f2
register SWAP '10' '11' '11' '00' 50 s
TAS read
'00'
'01'
AFHOLD
AFSAMPLE suggested IF DSP signal control quality detectors reset
tuning mute
WS processing
reset
FAST
001aae097
Fig 8. Preset mode
I2C-bus
P PLL 60 ms
time
tuning
f1
f2
register SWAP '11' '10' '11' '11' '00' 50 s
TAS read
AFHOLD
AFSAMPLE
001aae098
Fig 9. Preset mode, started during mute
TEF6730A_1
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Product data sheet
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NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
I2C-bus
P 1 ms PLL
time
tuning
f1
f2
register SWAP '10' '11' '11'
TAS read
'00'
'01'
AFHOLD
AFSAMPLE suggested IF DSP signal control quality detectors reset
tuning mute
WS processing
reset
FAST
001aae099
Fig 10. Search mode
I2C-bus
P PLL
time
tuning
f1
f2
register SWAP '11' '10' '11' '11'
TAS read
AFHOLD
AFSAMPLE
001aae100
Fig 11. Search mode, started during mute
TEF6730A_1
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Product data sheet
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NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
I2C-bus
P 0.5 ms 1 ms PLL 2 ms PLL
time
tuning
f1
f2
f2
f1
register SWAP '10' '11' '10' '00' '00'
TAS read
'00'
'01'
AFHOLD
AFSAMPLE suggested IF DSP signal control quality detectors reset store AFU result reset
tuning mute
WS processing
HOLD
001aae101
Fig 12. AF update mode
I2C-bus
P 0.5 ms PLL
time
tuning
f2
f1
register SWAP '11' '10' '00' '00'
TAS read
AFHOLD
AFSAMPLE
001aae102
Fig 13. AF update mode, started during mute
TEF6730A_1
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NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
I2C-bus
P 0.5 ms 1 ms PLL
time
tuning
f1
f2
register SWAP '10' '11' '00' '00'
TAS read
'00'
'01'
AFHOLD
AFSAMPLE suggested IF DSP signal control quality detectors reset
tuning mute
WS processing
HOLD
001aae103
Fig 14. Jump mode
I2C-bus
P 0.5 ms PLL
time
tuning
f1
f2
register SWAP '11' '10' '11' '00' '00'
TAS read
AFHOLD
AFSAMPLE
001aae104
Fig 15. Jump mode, started during mute
TEF6730A_1
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NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
I2C-bus
P 1 ms PLL
time
tuning
f1
f2
register SWAP '10' '11' '11'
TAS read
'00'
'01'
AFHOLD
AFSAMPLE suggested IF DSP signal control quality detectors reset
tuning mute
WS processing
HOLD
001aae105
Fig 16. Check mode
I2C-bus
P PLL
time
tuning
f1
f2
register SWAP '11' '10' '11' '11'
TAS read
AFHOLD
AFSAMPLE
001aae106
Fig 17. Check mode, started during mute
TEF6730A_1
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Product data sheet
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NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
I2C-bus
P
time '11' '00' '00'
TAS read
AFHOLD
AFSAMPLE suggested IF DSP signal control quality detectors
tuning mute
WS processing
001aae107
Fig 18. End mode
8.2.2 Write mode: data byte CONTROL
Table 14. 7 RFGAIN 0 Table 15. Bit 7 CONTROL - data byte 0h bit allocation with default setting 6 0 5 FLAG 0 4 IFGAIN 0 3 NBAGC1 0 2 NBAGC0 1 1 DAASW 0 0 CFSW 0
CONTROL - data byte 0h bit description Symbol RFGAIN Description FM RF gain 0 = standard gain 1 = +6 dB added gain
6 5
FLAG
not used, must be set to logic 0 software port output open-collector 0 = SWPORT pin inactive (high-impedance) 1 = SWPORT pin active (pull-down to ground)
4
IFGAIN
IF gain 0 = standard IF gain 1 = increased IF gain (6 dB)
3 and 2
NBAGC[1:0]
RF AGC start level; setting of narrow band (IF) detection 00 = 700 mV (peak value) 01 = 560 mV (peak value) 10 = 450 mV (peak value) 11 = 350 mV (peak value)
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NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
CONTROL - data byte 0h bit description ...continued Symbol DAASW Description antenna DAA mode in FM 0 = standard; DAA output voltage is controlled by Vtune 1 = DAA output voltage is a fixed temperature stable voltage controlled by the DAA setting (independent of Vtune)
Table 15. Bit 1
0
CFSW
ceramic filter switch 0 = CFSW1 pin active (low-impedance) and CFSW2 pin inactive (high-impedance) 1 = CFSW2 pin active (low-impedance) and CFSW1 pin inactive (high-impedance)
8.2.3 Write mode: data byte PLLM
Table 16. 7 CPOFF 0 Table 17. Bit 7 PLLM - data byte 1h bit allocation with default setting 6 PLL14 0 5 PLL13 0 4 PLL12 0 3 PLL11 1 2 PLL10 0 1 PLL9 0 0 PLL8 0
PLLM - data byte 1h bit description Symbol CPOFF Description charge pump off 0 = standard operation 1 = charge pump deactivated
6 to 0
PLL[14:8]
upper byte of PLL divider word
8.2.4 Write mode: data byte PLLL
Table 18. 7 PLL7 0 Table 19. Bit 7 to 0 PLLL - data byte 2h bit allocation with default setting 6 PLL6 1 5 PLL5 1 4 PLL4 1 3 PLL3 1 2 PLL2 1 1 PLL1 1 0 PLL0 0
PLLL - data byte 2h bit description Symbol PLL[7:0] Description lower byte of PLL divider word; PLL[14:0] is the divider ratio N of the VCO programmable divider; N = 1024 to 32767
8.2.5 Write mode: data byte DAA
Table 20. 7 AGCSW 0 DAA - data byte 3h bit allocation with default setting 6 DAA6 1 5 DAA5 0 4 DAA4 0 3 DAA3 0 2 DAA2 0 1 DAA1 0 0 DAA0 0
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NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
DAA - data byte 3h bit description Symbol AGCSW Description RF AGC switch 0 = no drive of unused RF AGC PIN diode (FM PIN diode in AM mode or AM PIN diode in FM mode) 1 = unused PIN diode supplied with constant current
Table 21. Bit 7
6 to 0
DAA[6:0]
alignment of antenna circuit tuning voltage in FM mode (0.1Vtune to 2.0Vtune)
8.2.6 Write mode: data byte AGC
Table 22. 7 SDAA3 1 Table 23. Bit 7 to 4 3 and 2 1 AGC - data byte 4h bit allocation with default setting 6 SDAA2 0 5 SDAA1 0 4 SDAA0 0 3 WBAGC1 0 2 WBAGC0 0 1 KAGC 0 0 LODX 0
AGC - data byte 4h bit description Symbol SDAA[3:0] WBAGC[1:0] KAGC Description alignment of second antenna circuit tuning voltage in FM mode (0.7VDAAOUT1 to 1.35VDAAOUT1) RF AGC start level; setting of wideband (RF) detection; for AM, see Table 24 and for FM, see Table 25 FM keyed AGC 0 = keyed AGC off 1 = keyed AGC on
0
LODX
local switch 0 = standard operation (DX) 1 = forced FM RF AGC attenuation (LOCAL)
Table 24. WBAGC1 0 0 1 1 Table 25. WBAGC1 0 0 1 1
Setting of RF AGC threshold voltage for AM WBAGC0 0 1 0 1 AM output (RMS value) at LNAOUT 250 mV 200 mV 150 mV 70 mV
Setting of RF AGC threshold voltage for FM WBAGC0 0 1 0 1 FM mixer input voltage (RMS value) at FMMIXIN 24 mV 17 mV 12 mV 9 mV
TEF6730A_1
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NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
8.2.7 Write mode: data byte BAND
Table 26. 7 BAND2 0 Table 27. Bit 7 to 5 4 to 2 1 0 BAND - data byte 5h bit allocation with default setting 6 BAND1 0 5 BAND0 1 4 FREF2 0 3 FREF1 0 2 FREF0 0 1 LOINJ 0 0 FMIFIN 0
BAND - data byte 5h bit description Symbol BAND[2:0] FREF[2:0] LOINJ FMIFIN Description see Table 28 PLL reference frequency; see Table 29 0 = high injection image suppression 1 = low injection image suppression 0 = FMIFAGCIN1 input is selected 1 = FMIFAGCIN2 input is selected
Table 28. BAND2 0 0 0 0 1 1 1 1 Table 29. FREF2 0 0 0 0 1 1 1 1
Decoding of BAND bits BAND1 0 0 1 1 0 0 1 1 Reference frequencies FREF1 0 0 1 1 0 0 1 1 FREF0 0 1 0 1 0 1 0 1 fref 100 kHz 50 kHz 25 kHz 20 kHz 10 kHz reserved reserved reserved BAND0 0 1 0 1 0 1 0 1 Divider ratio M 1 2 3 6 8 10 16 20 Receiver band WB FM FM AM AM AM AM AM
The correct charge pump current for each reference frequency is selected automatically, see Table 30.
TEF6730A_1
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Product data sheet
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NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
Table 30. FREF2 0 0 0 0 0 1
[1]
Charge pump source[1] FREF1 0 0 1 1 1 0 FREF0 0 1 0 1 1 0 LOINJ X X X 1 0 X Charge pump current CP1 CP2 CP3 CP3 CP4 CP5 fref 100 kHz 50 kHz 25 kHz 20 kHz 20 kHz 10 kHz
X = don't care.
8.2.7.1
Tuning overview ( f RF + 10.7 MHz ) x M If LOINJ = 0: N = --------------------------------------------------------- . f ref ( f RF - 10.7 MHz ) x M If LOINJ = 1: N = -------------------------------------------------------- . f ref f ref tuning step = --------- ; where M is the divider ratio of the VCO frequency for AM mixer and M f VCO FM mixer M = -------------- . f mixer
Table 31.
Standard tuner settings BAND2 BAND1 BAND0 M 0 0 0 0 1 1 1 1 0 0 1 1 0 1 1 0 0 1 1 0 0 0 1 0 1 0 1 2 3 3 1 FREF2 FREF1 FREF0 fref 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 1 0 1 0 0 0 0 LOINJ Tuning step 50 kHz 33.3 kHz 6.67 kHz 25 kHz 1 kHz 0.625 kHz 1 kHz 1.25 kHz 1.67 kHz 100 kHz 0 100 kHz 1 20 kHz 25 kHz 20 kHz 10 kHz 10 kHz 10 kHz 10 kHz 1 0 0 0 0 0 0
Broadcast band Europe FM and US FM Japan FM East Europe FM (OIRT FM) WB FM AM MW and LW AM SW 120 m to 60 m AM SW 49 m to 22 m AM SW 25 m to 15 m AM SW 16 m to 11 m
20 0 16 1 10 1 8 6 1 1
8.2.8 Write mode: data byte TEST
Table 32. 7 0 TEST - data byte Fh bit allocation with default setting (not buffered)[1] 6 0 5 0 4 0 3 TEST3 0
[1] The test control byte is for internal use only.
2 TEST2 0
1 TEST1 0
0 TEST0 0
TEF6730A_1
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Product data sheet
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NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
9. Limiting values
Table 33. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VCCA Parameter analog supply voltage Conditions on pins VCC, VCC(PLL), VCC(VCO), VCC(RF), VCC(IF), FMMIXOUT1, FMMIXOUT2, AMMIXOUT1 and AMMIXOUT2 Min -0.3 Max +10 Unit V
VCCAn VSCL VSDA Vi Vo Vn Ptot Tstg Tamb
voltage difference between any analog supply pins voltage on pin SCL voltage on pin SDA input voltage output voltage voltage on any other pin total power dissipation storage temperature ambient temperature soldered exposed die pad subjective functionality full functionality on pins ADDR1 and ADDR2 on pins AFHOLD and AFSAMPLE on pin SWPORT
[1]
-0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -55 -40 -40
[2] [3]
+0.3 +5.5 +5.5 +5.5 +5.5 +10 1100 +150 +105 +85 +2000 +500 +2000 +500
V V V V V V mW C C C V V V V
VCCA + 0.3 V
Vesd
electrostatic discharge voltage
on all pins except pin VCC(VCO) on pin VCC(VCO)
-2000 -500 -1000 -500
[4] [3]
[1] [2] [3] [4]
The maximum voltage must be less than VCCA. Human body model: Class 2 according to JESD22-A114C.01. Charge device model: Class 3 according to JESD22-C101C. Human body model: Class 1C according to JESD22-A114C.01.
10. Thermal characteristics
Table 34. Symbol Rth(j-a) Rth(j-c) Thermal characteristics Parameter thermal resistance from junction to case Conditions Typ 29.6 17.5 Unit K/W K/W thermal resistance from junction to ambient in free air
TEF6730A_1
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27 of 58
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
11. Static characteristics
Table 35. Static characteristics VCCA = 8.5 V; Tamb = 25 C; unless otherwise specified. Symbol VCCA Parameter Conditions Min 8 Typ 8.5 Max 9 Unit V Supply voltage analog supply voltage on pins VCC, VCC(PLL), VCC(VCO), VCC(RF), VCC(IF), FMMIXOUT1, FMMIXOUT2, AMMIXOUT1 and AMMIXOUT2 RF supply current Tamb = -40 C Tamb = 25 C Tamb = 85 C ICC(PLL) PLL supply current Tamb = -40 C Tamb = 25 C Tamb = 85 C ICC(VCO) VCO supply current Tamb = -40 C Tamb = 25 C Tamb = 85 C ICC supply current Tamb = -40 C Tamb = 25 C Tamb = 85 C ICC(IFAGC) IF AGC supply current Tamb = -40 C Tamb = 25 C Tamb = 85 C IFMMIXOUT1 current on pin FMMIXOUT1 Tamb = -40 C Tamb = 25 C Tamb = 85 C IFMMIXOUT2 current on pin FMMIXOUT2 Tamb = -40 C Tamb = 25 C Tamb = 85 C ICC(tot) ICC(RF) total supply current RF supply current Tamb = -40 C Tamb = 25 C Tamb = 85 C ICC(PLL) PLL supply current Tamb = -40 C Tamb = 25 C Tamb = 85 C ICC(VCO) VCO supply current Tamb = -40 C Tamb = 25 C Tamb = 85 C
TEF6730A_1
Current in FM mode ICC(RF) 14 15 16 7.9 7.6 7.2 3.8 3.6 3.5 23 21.5 19 26 26 26 5.3 5.8 6.1 5.3 5.8 6.1 85.3 39.5 39 38 7.9 7.6 7.2 3.8 3.6 3.5 mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA
Current in AM mode
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NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
Table 35. Static characteristics ...continued VCCA = 8.5 V; Tamb = 25 C; unless otherwise specified. Symbol ICC Parameter supply current Conditions Tamb = -40 C Tamb = 25 C Tamb = 85 C ICC(IFAGC) IF AGC supply current Tamb = -40 C Tamb = 25 C Tamb = 85 C IAMMIXOUT1 current on pin AMMIXOUT1 Tamb = -40 C Tamb = 25 C Tamb = 85 C IAMMIXOUT2 current on pin AMMIXOUT2 Tamb = -40 C Tamb = 25 C Tamb = 85 C ICC(tot) total supply current Min Typ 21.5 21 20 33 32.5 32 6 5.5 5 6 5.5 5 114.7 Max Unit mA mA mA mA mA mA mA mA mA mA mA mA mA
12. Dynamic characteristics
Table 36. Dynamic characteristics VCCA = 8.5 V; Tamb = 25 C; see Figure 25; all AC values are given in RMS; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Reference frequency External reference frequency, circuit inputs: pins FREF1 and FREF2 fext C/N external frequency carrier-to-noise ratio required from reference source; fext = 100 kHz; f = 10 kHz square wave signal square wave signal
[1]
115
100 -
-
kHz dBc/Hz
Ii(ext)(min)(M) Ii(ext)(max)(M) Icm(ext) Ri Vcm
peak minimum external input current peak maximum external input current
750 -50 -
5 1.2
200 +50 10 1.4
A A A V
[1]
external from each pin to GND common-mode current input resistance common-mode voltage measured between each pin to GND
1.0
Tuning system; see Table 28, Table 29, Table 30 and Table 31 Voltage controlled oscillator fVCO(min) minimum VCO frequency maximum VCO frequency carrier-to-noise ratio fVCO = 200 MHz; f = 10 kHz; Q = 30
[2]
256 94
98
130 159.9 -
MHz MHz MHz dBc/Hz
application according to Figure 25
[2]
fVCO(max) C/N
[2]
TEF6730A_1
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Product data sheet
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NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
Table 36. Dynamic characteristics ...continued VCCA = 8.5 V; Tamb = 25 C; see Figure 25; all AC values are given in RMS; unless otherwise specified. Symbol f Parameter frequency deviation Conditions caused by ripple on supply voltage; fripple = 100 Hz; VCC(ripple) = 50 mV (RMS); fVCO = 200 MHz; standard FM VCPOUT = 0.5 V to VCC(PLL) - 1.3 V VCPOUT = 0.5 V to VCC(PLL) - 1.3 V VCPOUT = 0.7 V to VCC(PLL) - 1.5 V VCPOUT = 0.7 V to VCC(PLL) - 1.5 V VCPOUT = 0.7 V to VCC(PLL) - 0.7 V VCPOUT = 0.7 V to VCC(PLL) - 0.7 V VCPOUT = 0.7 V to VCC(PLL) - 0.7 V VCPOUT = 0.7 V to VCC(PLL) - 0.7 V VCPOUT = 0.7 V to VCC(PLL) - 0.7 V VCPOUT = 0.7 V to VCC(PLL) - 0.7 V Vtune = 0.9 V to VCC(PLL) - 0.7 V Vtune = 0.9 V to VCC(PLL) - 0.7 V Europe FM and US FM band; fref = 100 kHz; fRF = 87.5 MHz to 108 MHz AM MW band; fref = 20 kHz; fRF = 0.53 MHz to 1.7 MHz tupd(AF) AF update time cycle time for inaudible AF update including 1 ms mute start and 1 ms mute release time Min Typ 2 Max Unit Hz
Charge pump: pin CPOUT; see Table 30 Isink(CP1) Isource(CP1) Isink(CP2) Isource(CP2) Isink(CP3) Isource(CP3) Isink(CP4) Isource(CP4) Isink(CP5) Isource(CP5) CP1 sink current CP1 source current CP2 sink current CP2 source current CP3 sink current CP3 source current CP4 sink current CP4 source current CP5 sink current CP5 source current 130 -240 270 -480 580 -1050 1040 -1900 1630 -2970 180 -180 360 -360 780 -780 1400 -1400 2 200 -2200 240 -130 480 -270 1050 -580 1900 -1040 2970 -1630 A A A A A A A A A A
Charge pump: pin VTUNE Io(sink) Io(source) Timings ttune tuning time 0.75 1 ms output sink current output source current 2070 -3780 2800 -2800 3780 -2070 A A
-
6
10 6.5
ms ms
Antenna Digital Auto Alignment (DAA) DAA1: pin DAAOUT1[3] Gconv(DAA) DAA conversion gain 0.1 2
TEF6730A_1
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Product data sheet
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30 of 58
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
Table 36. Dynamic characteristics ...continued VCCA = 8.5 V; Tamb = 25 C; see Figure 25; all AC values are given in RMS; unless otherwise specified. Symbol Vo Parameter output voltage Conditions FM mode; DAASW = 0 minimum value maximum value FM mode; DAASW = 1; independent of tuning voltage minimum value; data byte DAA bits DAA[6:0] = 000 0000 maximum value; data byte DAA bits DAA[6:0] = 111 1111 AM mode; independent of tuning voltage minimum value; data byte DAA bits DAA[6:0] = 000 0000 maximum value; data byte DAA bits DAA[6:0] = 111 1111 Vn(o) output noise voltage data byte DAA bits DAA[6:0] = 100 0000; FM mode; Vtune = 4 V with frequency range from 300 Hz to 22 kHz Tamb = -40 C to +85 C; data byte DAA bits DAA[6:0] = 100 0000 n = 0 to 127; FM mode; Vtune = 4 V Vtune = 4 V; Iload = 50 A Vtune = 4 V; Iload = -50 A VDAAOUT1 = 0.2 V to 8.25 V; CL = 270 pF VCC(ripple) / Vo; data byte DAA bits DAA[6:0] = 101 0101; FM mode; Vtune = 4 V; fripple = 100 Hz; VCC(ripple) = 100 mV 0.6 V 0.6 V 0.6 V V VCC(PLL) - 0.6 Min Typ Max Unit
VCC(PLL) - 0.6 -
-
V
VCC(PLL) - 0.6 -
-
V
-
30
100
V
Vo(T)
output voltage deviation over temperature step output voltage tolerance output voltage deviation output settling time ripple rejection
-30
-
+30
mV
Vo(step) Vo ts(o) ripple
-0.5VLSB -VLSB -VLSB -
0 30 40
+0.5VLSB +VLSB +VLSB 60 s dB
DAA2: pin DAAOUT2[4] Gconv(DAA) Vo DAA conversion gain output voltage AM mode and FM mode minimum value maximum value Vn(o) output noise voltage data byte AGC bits SDAA[3:0] = 1000; FM mode; VDAAOUT1 = 4 V with frequency range from 300 Hz to 22 kHz 30 0.6 100 V V V VCC(PLL) - 0.8 0.7 1.35
TEF6730A_1
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Product data sheet
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NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
Table 36. Dynamic characteristics ...continued VCCA = 8.5 V; Tamb = 25 C; see Figure 25; all AC values are given in RMS; unless otherwise specified. Symbol Vo(T) Parameter output voltage deviation over temperature step output voltage tolerance output voltage deviation output settling time Conditions Tamb = -40 C to +85 C; data byte AGC bits SDAA[3:0] = 1000 n = 0 to 15; FM mode; VDAAOUT1 = 4 V VDAAOUT1 = 4 V; Iload = 50 A VDAAOUT1 = 4 V; Iload = -50 A VDAAOUT1 = 4 V; VDAAOUT2 = 2.8 V to 5.4 V; CL = 270 pF VCC(ripple) / VDAAOUT1; data byte AGC bits SDAA[3:0] = 1010; FM mode; VDAAOUT1 = 4 V; fripple = 100 Hz; VCC(ripple) = 100 mV Min -30 Typ Max +30 Unit mV
Vo(step) Vo ts(o)
-0.5VLSB -VLSB -VLSB -
0 20
+0.5VLSB +VLSB +VLSB 30 s
ripple
ripple rejection
-
50
-
dB
AM channel AM RF AGC wideband detector (average detector): pin LNAOUT VLNAOUT(RMS) RMS voltage on pin LNAOUT start level of wideband AGC; RL = 430 (load at pin LNAOUT); m = 0.3; see Table 24 and Table 25 data byte AGC bits WBAGC[1:0] = 00 data byte AGC bits WBAGC[1:0] = 01 data byte AGC bits WBAGC[1:0] = 10 data byte AGC bits WBAGC[1:0] = 11 AM RF AGC narrow-band detector: pins IFOUT1 and IFOUT2 Vo(IFOUT)(M) peak output voltage between pin IFOUT1 and pin IFOUT2 start level of narrow-band AGC; data byte CONTROL bit IFGAIN = 0; VIFAGCMSB = HIGH; VIFAGCLSB = LOW; see Table 15 data byte CONTROL bits NBAGC[1:0] = 00 data byte CONTROL bits NBAGC[1:0] = 01 data byte CONTROL bits NBAGC[1:0] = 10 data byte CONTROL bits NBAGC[1:0] = 11 AM LNA and AGC 490 390 315 245 700 560 450 350 980 780 630 490 mV mV mV mV 175 140 105 49 250 200 150 70 350 280 210 98 mV mV mV mV
Input: pin LNAIN; output: pin LNAOUT
Ri
TEF6730A_1
input resistance
0.9
1.3
1.8
M
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Product data sheet
Rev. 01 -- 21 February 2007
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NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
Table 36. Dynamic characteristics ...continued VCCA = 8.5 V; Tamb = 25 C; see Figure 25; all AC values are given in RMS; unless otherwise specified. Symbol Ci Gm Gm(T) Parameter input capacitance transconductance gain Io / Vi transconductance gain Tamb = -40 C to +85 C; deviation over see Figure 19 temperature third-order intercept point RL = 430 (load at pin LNAOUT) Conditions Min 36 Typ 46 52 Max 69 74 Unit pF mA/V dB
IP3 IP2 Vn(i)(eq)
111 120
114 129
-
dBV dBV
second-order intercept RL = 430 (load at pin LNAOUT) point equivalent input noise voltage Csource = 110 pF; RL = 430 (load at pin LNAOUT) fRF = 1 MHz fRF = 144 kHz
80 -
1.1 2.55 115 22 2.2
1.55 3.55 165 33 -
nV/Hz nV/Hz pF V
Ro Co Vo(p-p)(max)
output resistance output capacitance maximum peak-to-peak output voltage AGC gain range AGC gain range voltage on pin IAMAGC maximum sink current sink current fRF = 1 MHz; dummy aerial 15 pF / 60 pF PIN diode drive DC voltage VIAMAGC = 2.2 V FM mode; data byte DAA bit AGCSW = 1 FM mode; data byte DAA bit AGCSW = 0
[5]
in series with output resistance
GAGC GAGC VIAMAGC Isink(max) Isink
8 2.2 10 0.6 -
11 50 0.9 -
14 VCCA 1.4 100
dB dB V mA mA nA
RF PIN diode AGC current generator output: pin IAMAGC
AM mixer (IF = 10.7 MHz)
Mixer input: pins AMMIXIN and AMMIXDEC
Ri Ci Vi(max) input resistance input capacitance maximum input voltage on pin AMMIXIN; 1 dB compression point of VMIXOUT1-MIXOUT2; m = 0
[7] [7] [6] [6]
40 500
3 -
4.5 -
k pF mV
Mixer output: pins AMMIXOUT1 and AMMIXOUT2
Ro Co Vo(p-p)(max) output resistance output capacitance maximum peak-to-peak output voltage conversion Io / Vi transconductance gain 100 12 4 15 7 k pF V
Gm(conv)
1.8
2.4
3.2
mA/V
TEF6730A_1
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Product data sheet
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33 of 58
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
Table 36. Dynamic characteristics ...continued VCCA = 8.5 V; Tamb = 25 C; see Figure 25; all AC values are given in RMS; unless otherwise specified. Symbol Gm(conv)(T) Parameter Conditions Min Typ Max Unit dB Tamb = -40 C to +85 C; conversion transconductance gain see Figure 20 deviation over temperature third-order intercept point RL = 2.6 k (AC load between output pins); f = 300 kHz
IP3 IP2 Vn(i)(eq)
135 -
138 170 7.2
10
dBV dBV nV/Hz
second-order intercept RL = 2.6 k (AC load between output pins) point equivalent input noise voltage band limited noise; Rsource = 750 ; noise of Rsource included; RL = 2.6 k (AC load between output pins)
NF FM channel
noise figure
-
6.2
9
dB
FM RF AGC (FM distance mode; data byte AGC bit LODX = 0)
Input: pins FMMIXIN1 and FMMIXIN2[8]
Vi(FMMIXIN)(RMS) RMS input voltage between pin FMMIXIN1 and pin FMMIXIN2 start level of wideband AGC; keyed AGC off; data byte AGC bit KAGC = 0; see Table 24 and Table 25 data byte AGC bits WBAGC[1:0] = 11 data byte AGC bits WBAGC[1:0] = 10 data byte AGC bits WBAGC[1:0] = 01 data byte AGC bits WBAGC[1:0] = 00 start level of wideband AGC; keyed AGC on; data byte AGC bit KAGC = 1; VKAGC > Vth(KAGC) data byte AGC bits WBAGC[1:0] = 11 data byte AGC bits WBAGC[1:0] = 10 data byte AGC bits WBAGC[1:0] = 01 data byte AGC bits WBAGC[1:0] = 00 19 21 24 28 30 33 38 45 48 52 60 71 mV mV mV mV 5 7 10 14 9 12 17 24 15 19 27 38 mV mV mV mV
TEF6730A_1
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Product data sheet
Rev. 01 -- 21 February 2007
34 of 58
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
Table 36. Dynamic characteristics ...continued VCCA = 8.5 V; Tamb = 25 C; see Figure 25; all AC values are given in RMS; unless otherwise specified. Symbol Vo(IFOUT)(M) Parameter peak output voltage between pin IFOUT1 and pin IFOUT2 Conditions start level of narrow-band AGC; data byte CONTROL bit IFGAIN = 0; VIFAGCMSB = HIGH; VIFAGCLSB = LOW; see Table 15 data byte CONTROL bits NBAGC[1:0] = 00 data byte CONTROL bits NBAGC[1:0] = 01 data byte CONTROL bits NBAGC[1:0] = 10 data byte CONTROL bits NBAGC[1:0] = 11 490 390 315 245 700 560 450 350 980 780 630 490 mV mV mV mV Min Typ Max Unit FM RF AGC narrow-band detector: pins IFOUT1 and IFOUT2
PIN diode drive output: pin IFMAGC
Isource(max) Isink(max) maximum source current maximum sink current VTFMAGC = VIFMAGC + 1.4 V; data byte AGC bit KAGC = 0 at AGC decay; VTFMAGC = VIFMAGC; data byte AGC bit KAGC = 0 AM mode; data byte DAA bit AGCSW = 1 AM mode; data byte DAA bit AGCSW = 0 data byte AGC bit LODX = 1 (FM local) VIFMAGC Vth(KAGC) voltage on pin IFMAGC threshold voltage on pin KAGC voltage at PIN diode drive output; VFMMIXIN1 < Vth threshold level voltage for narrow-band AGC (keyed AGC); data byte AGC bit KAGC = 1; see Table 15 and Table 23 -16 7 -10 10 -7 16 mA mA
Isource
source current
-0.75 500
-1.2 0 -0.5 100 950
-0.35 300 1400
mA mA mA mV mV
FM mixer (IF = 10.7 MHz)
FM RF input: pins FMMIXIN1 and FMMIXIN2[8]
Vi(RF)(max) Vn(i)(eq) maximum RF input voltage equivalent input noise voltage 1 dB compression point of FM mixer output voltage Rsource = 500 ; noise of Rsource included; RL = 2.6 k (on output pins FMMIXOUT1 and FMMIXOUT2) RFGAIN = 0 RFGAIN = 1 Ri input resistance RFGAIN = 0 RFGAIN = 1 3 1.6 4.7 4.2 3.8 2.0 6.4 4.7 2.5 nV/Hz nV/Hz k k 75 100 mV
TEF6730A_1
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Product data sheet
Rev. 01 -- 21 February 2007
35 of 58
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
Table 36. Dynamic characteristics ...continued VCCA = 8.5 V; Tamb = 25 C; see Figure 25; all AC values are given in RMS; unless otherwise specified. Symbol Ci Gm(conv) Parameter input capacitance conversion Io / Vi; RF gain 1; data byte transconductance gain PLLM bit RFGAIN = 0 Io / Vi; RF gain 2; data byte PLLM bit RFGAIN = 1 Gm(conv)(T) Tamb = -40 C to +85 C; conversion transconductance gain see Figure 21 deviation over temperature noise figure Rsource = 500 ; Tamb = 25 C RFGAIN = 0 RFGAIN = 1 IP3 IRR third-order intercept point image rejection ratio RFGAIN = 0 RFGAIN = 1 Vo(wanted) / Vo(image); fRF(wanted) = 87.5 MHz; fRF(image) = 108.9 MHz 117 108 25 4.2 3.2 123 114 40 5.7 4.7 dB dB dBV dBV dB Conditions Min 12 24 Typ 2 18 36 Max 4 25 50 Unit pF mA/V mA/V dB
NF
Output: pins FMMIXOUT1 and FMMIXOUT2[9]
Ro Co Vo(p-p)(max) output resistance output capacitance maximum peak-to-peak output voltage conversion Io / Vi transconductance gain Tamb = -40 C to +85 C; conversion transconductance gain see Figure 22 deviation over temperature input resistance input capacitance noise figure third-order intercept point image rejection ratio Vo(wanted) / Vo(image); fRF(wanted) = 162.475 MHz; fRF(image) = 183.875 MHz Rsource = 300 100 4.5 4 5.6 6 k pF V
FM weather band input: pins WXMIXIN and WXMIXDEC
Gm(conv) Gm(conv)(T) 10 15 21 mA/V dB
Ri Ci NF IP3 IRR
20
5.1 2 3.5 116 33
4 5 -
k pF dB dBV dB
IF AGC amplifier AM mode; inputs: pins AMIFAGCIN and IFAGCDEC[10]; outputs: pins IFOUT1 and IFOUT2[11] Ri Ci Ro input resistance input capacitance output resistance 120 100 5 210 7 290 k pF
TEF6730A_1
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Product data sheet
Rev. 01 -- 21 February 2007
36 of 58
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
Table 36. Dynamic characteristics ...continued VCCA = 8.5 V; Tamb = 25 C; see Figure 25; all AC values are given in RMS; unless otherwise specified. Symbol G Parameter gain Conditions data byte CONTROL bit IFGAIN = 0 VIFAGCMSB = LOW; VIFAGCLSB = LOW VIFAGCMSB = LOW; VIFAGCLSB = HIGH VIFAGCMSB = HIGH; VIFAGCLSB = HIGH VIFAGCMSB = HIGH; VIFAGCLSB = LOW data byte CONTROL bit IFGAIN = 1 VIFAGCMSB = LOW; VIFAGCLSB = LOW VIFAGCMSB = LOW; VIFAGCLSB = HIGH VIFAGCMSB = HIGH; VIFAGCLSB = HIGH VIFAGCMSB = HIGH; VIFAGCLSB = LOW NF noise figure Rsource = 300 ; data byte CONTROL bit IFGAIN = 0; VIFAGCMSB = LOW; VIFAGCLSB = LOW two output signals at 35 kHz frequency distance; differential output level of 200 mV; data byte CONTROL bit IFGAIN = 0 VIFAGCMSB = LOW; VIFAGCLSB = LOW VIFAGCMSB = LOW; VIFAGCLSB = HIGH VIFAGCMSB = HIGH; VIFAGCLSB = HIGH VIFAGCMSB = HIGH; VIFAGCLSB = LOW 77 77 77 74 83 83 83 80 dB dB dB dB 27.2 21.2 15.2 9.2 30.2 24.2 18.2 12.2 12.9 33.2 27.2 21.2 15.2 16 dB dB dB dB dB 21.2 15.2 9.2 3.2 24.2 18.2 12.2 6.2 27.2 21.2 15.2 9.2 dB dB dB dB Min Typ Max Unit
IM3
third-order intermodulation distance
TEF6730A_1
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Product data sheet
Rev. 01 -- 21 February 2007
37 of 58
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
Table 36. Dynamic characteristics ...continued VCCA = 8.5 V; Tamb = 25 C; see Figure 25; all AC values are given in RMS; unless otherwise specified. Symbol Vi(max)(M) Parameter peak maximum input voltage Conditions 1 dB compression point of IF AGC amplifier output voltage; data byte CONTROL bit IFGAIN = 0 VIFAGCMSB = LOW; VIFAGCLSB = LOW VIFAGCMSB = LOW; VIFAGCLSB = HIGH VIFAGCMSB = HIGH; VIFAGCLSB = HIGH VIFAGCMSB = HIGH; VIFAGCLSB = LOW Ri Ci Ro G input resistance input capacitance output resistance gain data byte CONTROL bit IFGAIN = 0 VIFAGCMSB = LOW; VIFAGCLSB = LOW VIFAGCMSB = LOW; VIFAGCLSB = HIGH VIFAGCMSB = HIGH; VIFAGCLSB = HIGH VIFAGCMSB = HIGH; VIFAGCLSB = LOW data byte CONTROL bit IFGAIN = 1 VIFAGCMSB = LOW; VIFAGCLSB = LOW VIFAGCMSB = LOW; VIFAGCLSB = HIGH VIFAGCMSB = HIGH; VIFAGCLSB = HIGH VIFAGCMSB = HIGH; VIFAGCLSB = LOW NF noise figure Rsource = 300 ; data byte CONTROL bit IFGAIN = 0; VIFAGCMSB = LOW; VIFAGCLSB = LOW data byte CONTROL bit IFGAIN = 0 34 28 22 16 37 31 25 19 6.9 40 34 28 22 8.5 dB dB dB dB dB 28 22 16 10 31 25 19 13 34 28 22 16 dB dB dB dB 45 90 180 360 mV mV mV mV Min Typ Max Unit
FM mode; inputs: pins FMIFAGCIN1 and IFAGCDEC[12]; outputs: pins IFOUT1 and IFOUT2[11] 120 330 5 210 7 290 pF
IP3
third-order intercept point
110
115
-
dBV
TEF6730A_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 21 February 2007
38 of 58
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
Table 36. Dynamic characteristics ...continued VCCA = 8.5 V; Tamb = 25 C; see Figure 25; all AC values are given in RMS; unless otherwise specified. Symbol Vi(max)(M) Parameter peak maximum input voltage Conditions 1 dB compression point of IF AGC amplifier output voltage; data byte CONTROL bit IFGAIN = 0 VIFAGCMSB = LOW; VIFAGCLSB = LOW VIFAGCMSB = LOW; VIFAGCLSB = HIGH VIFAGCMSB = HIGH; VIFAGCLSB = HIGH VIFAGCMSB = HIGH; VIFAGCLSB = LOW Ri Ci G input resistance input capacitance gain data byte CONTROL bit IFGAIN = 0 VIFAGCMSB = LOW; VIFAGCLSB = LOW VIFAGCMSB = LOW; VIFAGCLSB = HIGH VIFAGCMSB = HIGH; VIFAGCLSB = HIGH VIFAGCMSB = HIGH; VIFAGCLSB = LOW data byte CONTROL bit IFGAIN = 1 VIFAGCMSB = LOW; VIFAGCLSB = LOW VIFAGCMSB = LOW; VIFAGCLSB = HIGH VIFAGCMSB = HIGH; VIFAGCLSB = HIGH VIFAGCMSB = HIGH; VIFAGCLSB = LOW NF noise figure Rsource = 300 ; data byte CONTROL bit IFGAIN = 0; VIFAGCMSB = LOW; VIFAGCLSB = LOW data byte CONTROL bit IFGAIN = 0 34 28 22 16 37 31 25 19 6.9 40 34 28 22 8.5 dB dB dB dB dB 28 22 16 10 31 25 19 13 34 28 22 16 dB dB dB dB 20 40 80 160 mV mV mV mV Min Typ Max Unit
FM mode; inputs: pins FMIFAGCIN2 and IFAGCDEC[13]; outputs: pins IFOUT1 and IFOUT2[11] 330 5 7 pF
IP3
third-order intercept point
110
115
-
dBV
TEF6730A_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 21 February 2007
39 of 58
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
Table 36. Dynamic characteristics ...continued VCCA = 8.5 V; Tamb = 25 C; see Figure 25; all AC values are given in RMS; unless otherwise specified. Symbol Vi(max)(M) Parameter peak maximum input voltage Conditions 1 dB compression point of IF AGC amplifier output voltage; data byte CONTROL bit IFGAIN = 0 VIFAGCMSB = LOW; VIFAGCLSB = LOW VIFAGCMSB = LOW; VIFAGCLSB = HIGH VIFAGCMSB = HIGH; VIFAGCLSB = HIGH VIFAGCMSB = HIGH; VIFAGCLSB = LOW Digital inputs and outputs Input: pins IFAGCMSB and IFAGCLSB VIL VIH LOW-level input voltage HIGH-level input voltage maximum sink current maximum sink current AFHOLD = LOW; Vo = 0.4 V AFSAMPLE = LOW; Vo = 0.4 V data byte CONTROL bit FLAG = 1; Vo = 0.4 V 1.5 0.9 V V 20 40 80 160 mV mV mV mV Min Typ Max Unit
Output: pin AFHOLD Isink(max) Isink(max) 1.0 1.0 mA mA Output: pin AFSAMPLE
Output: pin SWPORT Isink(max) maximum sink current 1.0 mA
[1] [2] [3]
Differential current on pins FREF1 and FREF2. The VCO frequency is determined by the external circuit at pins OSCFDB and OSCTNK. Conversion gain formula of DAA1: V DAAOUT 1 = 1.915 x -------- + 0.1 x V tune where n = 0 to 127. 128
n
[4] [5] [6] [7] [8] [9]
Conversion gain formula of DAA2: V DAAOUT 2 = 0.693 x ----- + 0.7 x V DAAOUT 1 where n = 0 to 15. 16
n
The sink current must be limited to 18 mA by the external circuit. Input parameters of AM mixer measured between pins AMMIXIN and AMMIXDEC. Output parameters of AM mixer measured between pins AMMIXOUT1 and AMMIXOUT2. Input parameters of FM mixer measured between pins FMMIXIN1 and FMMIXIN2. Output parameters of FM mixer measured between pins FMMIXOUT1 and FMMIXOUT2.
[10] Input parameters of AM IF amplifier measured between pins AMIFAGCIN and IFAGCDEC. [11] Output parameters of IF AGC amplifier measured between pins IFOUT1 and IFOUT2. [12] Input parameters of FM IF amplifier measured between pins FMIFAGCIN1 and IFAGCDEC. [13] Input parameters of FM IF amplifier measured between pins FMIFAGCIN2 and IFAGCDEC.
TEF6730A_1
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Product data sheet
Rev. 01 -- 21 February 2007
40 of 58
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
2 Gm(T) (dB) 1
001aae090
1.0 Gm(conv)(T) (dB) 0.5
001aae091
0
0
-1
-0.5
-2 -40
0
40
80
100 Tamb (C)
-1.0 -40
0
40
80
100 Tamb (C)
Fig 19. AM LNA transconductance gain deviation over temperature (including application)
Fig 20. AM mixer conversion transconductance gain deviation over temperature (including application)
0.5 Gm(conv)(T) (dB) 0
001aae092
10 Gm(conv)(T) (dB) 5
001aae093
-0.5
0
-1.0
-5
-1.5 -40
0
40
80
100 Tamb (C)
-10 -40
0
40
80
100 Tamb (C)
Fig 21. FM mixer conversion transconductance gain deviation over temperature (including application)
Fig 22. Weather band mixer conversion transconductance gain deviation over temperature (including application)
13. I2C-bus characteristics
The TEF6730AHW complies with the fast-mode I2C-bus protocol. The maximum I2C-bus communication speed is 400 kbit/s. SDA and SCL HIGH and LOW internal thresholds are specified according to an I2C-bus voltage range from 2.5 V to 3.3 V including I2C-bus voltage tolerances of 10 %. The I2C-bus interface tolerates also SDA and SCL signals from a 5 V bus. Restrictions for VIL in a 5 V application can be derived from Table 37.
TEF6730A_1 (c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 21 February 2007
41 of 58
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
Table 37. Symbol VIL VIH Ci tresp(Q)HL
I2C-bus parameters Parameter LOW-level input voltage HIGH-level input voltage capacitance for each I/O pin HIGH-to-LOW data output response time pin SDA pin SCL acknowledge and read data; see Figure 23 VDD = 5 V; I = 3 mA; Cb = 400 pF VDD = 3.3 V; Rp = 1.8 k; Cb = 400 pF VDD = 2.5 V; Rp = 35 k; Cb = 10 pF [1]
Conditions
Min 1.56 -
Typ 4 3
Max 1.09 6 5
Unit V V pF pF
700 570 520 450
863 668 593 488 250
ns ns ns ns ns ns
tresp(Q)LH tof
LOW-to-HIGH data output response time output fall time from VIHmin to VILmax
read data; see Figure 23 Cb = 10 pF to 120 pF; see Figure 24 Cb 120 pF; see Figure 24
20 + 0.1Cb 10 x VDD 20 + 0.1Cb -
[1][2]
[1] [2]
Minimum value of tof; Cb = total capacitance of one I2C-bus line [pF]. Typical value of tof; the output fall time tof [ns] depends on the total load capacitance Cb [pF] and the I2C-bus voltage VDD [V]: tof = 112 x VDD x Cb.
SDA
0.7VDD
SCL
VIL(max) tresp(Q)LH
001aaf002
VIL(max) tresp(Q)HL
001aaf001
a. Data change from LOW to HIGH Fig 23. Data output response time of the IC
b. Data change from HIGH to LOW
TEF6730A_1
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Product data sheet
Rev. 01 -- 21 February 2007
42 of 58
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
VDD 0.7VDD
0.3VDD tof
001aab803
Fig 24. Definition of the fall time of the output signal
14. Overall system parameters
Table 38. Overall system parameters VCCA = 8.5 V; Tamb = 25 C; see Figure 25; all AC values are given in RMS; unless otherwise specified. Symbol fi(RF) Parameter parameters[1] LW MW SW fIF Vsens Vi(RF) IF frequency sensitivity voltage RF input voltage (S+N)/N = 26 dB start level of wideband AGC data byte AGC bits WBAGC[1:0] = 00 data byte AGC bits WBAGC[1:0] = 01 data byte AGC bits WBAGC[1:0] = 10 data byte AGC bits WBAGC[1:0] = 11 Vi(RF)M peak RF input voltage start level of narrow-band AGC; m = 0 data byte AGC bits NBAGC[1:0] = 00 data byte AGC bits NBAGC[1:0] = 01 data byte AGC bits NBAGC[1:0] = 10 data byte AGC bits NBAGC[1:0] = 11 IP2 IP3 second-order intercept point referenced to receiver input third-order intercept point referenced to receiver input f = 40 kHz f = 100 kHz ripple ripple rejection VCC(ripple) / Vaudio; fripple = 100 Hz; VCC(ripple) = 10 mV (RMS); Vi(RF) = 1 mV to 1 V FM standard weather band fIF IF frequency 130 133 40 dBV dBV dB 200 170 140 115 152 mV mV mV mV dBV 125 100 75 35 mV mV mV mV 144 522 2.3 10.7 50 288 1710 26.1 kHz kHz MHz MHz V RF input frequency Conditions Min Typ Max Unit AM overall system
FM overall system parameters[2] fi(RF) RF input frequency 65 10.7 108 MHz MHz 162.4 162.55 MHz
TEF6730A_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 21 February 2007
43 of 58
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
Table 38. Overall system parameters ...continued VCCA = 8.5 V; Tamb = 25 C; see Figure 25; all AC values are given in RMS; unless otherwise specified. Symbol Vsens Parameter sensitivity voltage Conditions BIF = 170 kHz threshold extension enabled; weak signal handling enabled (SAF7730 N231) Vi(RF) RF input voltage start level of wideband AGC data byte AGC bits WBAGC[1:0] = 00 data byte AGC bits WBAGC[1:0] = 01 data byte AGC bits WBAGC[1:0] = 10 data byte AGC bits WBAGC[1:0] = 11 Vi(RF)M peak RF input voltage start level of narrow-band AGC; m = 0 data byte AGC bits NBAGC[1:0] = 00 data byte AGC bits NBAGC[1:0] = 01 data byte AGC bits NBAGC[1:0] = 10 data byte AGC bits NBAGC[1:0] = 11 IP3 ripple third-order intercept point ripple rejection f = 400 kHz VCC(ripple) / Vaudio; fripple = 100 Hz; VCC(ripple) = 10 mV (RMS); Vi(RF) = 500 V 17 14 11 9 123 64 mV mV mV mV dBV dB 19 14 10 7 mV mV mV mV Min Typ 2 1.1 Max Unit V V
[1] [2]
Based on 15 pF/60 pF dummy aerial, voltages at dummy aerial input, fmod = 400 Hz, 2.5 kHz audio bandwidth, fi(RF) = 990 kHz, m = 0.3 and nominal maximum IF AGC gain, unless otherwise specified. Based on 75 dummy aerial, voltages at dummy aerial input, fmod = 400 Hz, de-emphasis = 50 s, fi(RF) = 97.1 MHz, f = 22.5 kHz, nominal mixer gain and nominal maximum IF AGC gain, unless otherwise specified.
TEF6730A_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 21 February 2007
44 of 58
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Product data sheet Rev. 01 -- 21 February 2007
(c) NXP B.V. 2007. All rights reserved. TEF6730A_1
100 nF
15. Application information
NXP Semiconductors
VP
47 F
+8.5 V
1 nF 22
3.3 H
VP
1 nF
FREF
220 nF 22 nF
VP
37 40 pll
38 VCO
41 VCO
53
54
55
56 sup
57 sup
45 fgnd
52 dig
16, 18, 48, 49 i.c. flag 42
D1 BB208
C1 270 pF
L1 50 nH
39 PLL /N 36 35 REF fref BAND /M pll in-lock
4.7 k 10 k 2.2 k 3.9 nF 1.2 k 100 nF 22 k 1 nF
3.3 nF
TUNING STATE MACHINE
43 44
AFSAMPLE AFHOLD
33 32 29 28
6.8 pF
antenna DAA tuner control
CTRL
BUF write
46 address 47 address selection
I2C-BUS
50 51
TEF6730AHW
MIXER 90 WX read
SDA SCL
470 k 33 pF
27 26 ifagc
MIXER FM ifagc
90
L2 100 nH
D2 BB207
6.8 pF
MIXER
10 pF
4.7 pF D3 BAP70-02 L3 470 nH D4 BAP70-02 1 nF 18 pF L4 220 nH 1 nF 330 2.2 k
am/fm rf agc IF AGC
58 59 60 61
30 FM RF AGC rf 34 31 25 24 23 22
1 F
IFOUT1 IFOUT2 IFAGCMSB IFAGCLSB
AM RF AGC lna 21 20 19 17
AM LNA
lna rf 15 14 13 12 11 10 9
1
ifagc 8 7 6 5 4
22 nF 22 nF L6 1 nF
3
2
1
64
63
62
Front-end for digital-IF car radio
100 nF
KEYED AGC
6.8 H
100 nF 100 nF 100 nF
F
2.2 M
L5 47 mH
470 k 82 D5 100 nF 560 BAP70AM 100 nF 10 nF 1 nF 430 680 47 H 120 pF 1.8 nF
1 nF
10.7 MHz F1
TEF6730A
10 k
VP VP
390
VP
VP
H
H
220 pF
008aaa059
45 of 58
For list of components see Table 39.
Fig 25. Application diagram of TEF6730AHW
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
10 pF
RF input
L7 47 nH 12 pF
28
TEF6730AHW
29
10 pF
008aaa060
Fig 26. Weather band application Table 39. C1 L1 L2 L3 L4 L5 L6 L7 D1 D2 D3 D4 D5 F1 List of components for Figure 25 and Figure 26 Type 270 pF; type NP0 50 nH; E558CNA-100035 100 nH; C2520C-R10 470 nH; C2520C-R47 220 nH; C2520C-R22 47 mH; 388BN-1211Z PF670CCS-A065DX 47 nH; LQW31H BB208 BB207 BAP70-02 BAP70-02 BAP70AM SFELA10M7HAA0-B0 Manufacturer TOKO SAGAMI SAGAMI SAGAMI TOKO TOKO muRata NXP Semiconductors NXP Semiconductors NXP Semiconductors NXP Semiconductors NXP Semiconductors muRata capacitor for VCO tuning VCO coil FM input coil FM antenna coil FM antenna coil AM mains suppression coil 10.7 MHz IF coil weather band input coil VCO variable capacitance diode FM RF selectivity variable capacitance diode FM PIN diode FM PIN diode AM PIN diode 10.7 MHz IF ceramic filter
Symbol Component
TEF6730AHW
IF AGC
FM
330
AM 11 10 9 8 7 6 5 4 3 2 1
330
64
22 nF 22 nF
008aaa061
Fig 27. FM and AM mode
TEF6730A_1 (c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 21 February 2007
46 of 58
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
TEF6730AHW
IF AGC
FM
330
AM 11 10 9 8 7 6 5 4 3 2 1
330
64
10 nF
22 nF 22 nF
FM/AM
FM HD
008aaa062
Fig 28. FM/AM and FM HD mode
TEF6730AHW
IF AGC
FM
330
AM 11 10 9 8 7 6 5 4 3 2 1
330
64
10 nF
330 22 nF 22 nF
FM
AM
008aaa063
Fig 29. FM and AM (narrow band) mode
TEF6730A_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 21 February 2007
47 of 58
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
TEF6730AHW
IF AGC
FM
330
AM 11 10 9 8 7 6 5 4 3 2 1
330
64
10 nF
22 nF
330
22 nF
FM
FM HD
AM and AM HD
008aaa064
Fig 30. FM, AM, AM HD and FM HD mode
16. Test information
Table 40. Symbol DC operating points Pin Unloaded DC voltage (V) AM mode Min AMIFAGCIN FMIFAGCIN1 FMIFAGCIN2 IFAGCDEC SWDEC CFSW1 CFSW2 FMMIXOUT1 AMMIXOUT2 FMMIXOUT2 AMMIXOUT1 VCC(RF) V50LNA
TEF6730A_1
FM mode Typ 2.3 2.3 2.3 2.3 1.4 1.4 1.4 Max Min external 8.5 external 8.5 external 8.5 external 8.5 external 8.5 5.2 0.9 (c) NXP B.V. 2007. All rights reserved.
Typ 2.3 2.3 2.3 2.3 1.4 1.4 1.4
Max -
1 2 3 4 5 6 7 8 9 10 11 12 13
external 8.5 external 8.5 external 8.5 external 8.5 external 8.5 -
Product data sheet
Rev. 01 -- 21 February 2007
48 of 58
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
Table 40. Symbol
DC operating points ...continued Pin Unloaded DC voltage (V) AM mode Min Typ 1.9 4.7 0 5.2 3.9 3.9 1.4 1.1 Max FM mode Min floating floating floating external biasing external GND 0 0 0 0 0 0.8 6.6 VCC(PLL) - 0.6 VCC(PLL) - 0.7 8.5 8.5 FM: 2.4; WB: 0 FM: 2.8; WB: 0 FM: 3.2; WB: 0 FM: 2.4; WB: 0 FM: 2.8; WB: 0 FM: 3.2; WB: 0 WB: 2.0; FM: 0 WB: 2.4; FM: 0 WB: 2.8; FM: 0 WB: 2.0; FM: 0 WB: 2.4; FM: 0 WB: 2.8; FM: 0 external biasing 0.5 0.5 0 0 external 8.5 external GND 5.8 5.8 external 8.5 external 0 5 external GND external 8.5 or external GND external 8.5 or external GND external external I2C-bus I2C-bus voltage voltage 0 5 5.8 5.8 0.8 6.5 VCC(PLL) - 0.6 VCC(PLL) - 0.7 8.5 8.5 1.1 Typ 0.1 0.9 0 0.8 Max -
LNAIN AGCCNTRL i.c. LNAOUT i.c. LNAAGCDEC AMMIXDEC AMMIXIN TAMAGC PINAGCDEC IAMAGC RFGND FMMIXIN1 FMMIXIN2 WXMIXIN WXMIXDEC IFMAGC TFMAGC DAAOUT1 DAAOUT2 KAGC VTUNE CPOUT VCC(PLL) VCOGND OSCFDB OSCTNK VCC(VCO) SWPORT AFSAMPLE AFHOLD FGND ADDR2 ADDR1 i.c. i.c. SDA SCL DGND
TEF6730A_1
14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52
external biasing external GND 0.5 0.5 0 0 external 8.5 external GND external 8.5 external external GND
external 8.5 or external GND external 8.5 or external GND external external I2C-bus I2C-bus voltage voltage
external GND
external GND
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 21 February 2007
49 of 58
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
Table 40. Symbol
DC operating points ...continued Pin Unloaded DC voltage (V) AM mode Min Typ 1.2 1.2 4.3 Max 4.5 FM mode Min 4.1 external GND external 8.5 5.5 5.5 5.5 5.5 Typ 1.2 1.2 4.3 Max 4.5
FREF1 FREF2 VREF GND VCC IFOUT1 IFOUT2 IFAGCMSB IFAGCLSB VCC(IF) IFGND IFAGCBIAS
53 54 55 56 57 58 59 60 61 62 63 64
4.1 external GND external 8.5 -
external 0 or external 3.3 external 0 or external 3.3 external 8.5 external GND 2.3 -
external 0 or external 3.3 external 0 or external 3.3 external 8.5 external GND 2.3 -
TEF6730A_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 21 February 2007
50 of 58
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
17. Package outline
HTQFP64: plastic thermal enhanced thin quad flat package; 64 leads; body 10 x 10 x 1 mm; exposed die pad SOT855-1
c y exposed die pad X
Dh 48 49 33 32 ZE
A
e A A2 (A 3) A1 detail X 17 1 w D HD
M
Eh w bp pin 1 index 64 16 ZD B v
M M
E
HE
Lp L
v
M
A
e
bp
B
0
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max 1.2 A1 0.12 0.05 A2 1.05 0.95 A3 0.25 bp 0.27 0.17 c 0.18 0.12 D (1) 10.1 9.9 Dh 4.7 4.5 E (1) 10.1 9.9 Eh 4.7 4.5 e 0.5 HD HE L 1 Lp 0.75 0.45 v 0.2 w 0.08 y 0.1 ZD(1) ZE(1) 1.45 1.05 1.45 1.05
7 0
12.15 12.15 11.85 11.85
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included OUTLINE VERSION SOT855-1 REFERENCES IEC JEDEC MS-026 JEITA EUROPEAN PROJECTION ISSUE DATE 04-05-18 05-05-11
Fig 31. Package outline SOT855-1 (HTQFP64)
TEF6730A_1 (c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 21 February 2007
51 of 58
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
18. Soldering
This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 "Surface mount reflow soldering description".
18.1 Introduction to soldering
Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both the mechanical and the electrical connection. There is no single soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high densities that come with increased miniaturization.
18.2 Wave and reflow soldering
Wave soldering is a joining technology in which the joints are made by solder coming from a standing wave of liquid solder. The wave soldering process is suitable for the following:
* Through-hole components * Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless packages which have solder lands underneath the body, cannot be wave soldered. Also, leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered, due to an increased probability of bridging. The reflow soldering process involves applying solder paste to a board, followed by component placement and exposure to a temperature profile. Leaded packages, packages with solder balls, and leadless packages are all reflow solderable. Key characteristics in both wave and reflow soldering are:
* * * * * *
Board specifications, including the board finish, solder masks and vias Package footprints, including solder thieves and orientation The moisture sensitivity level of the packages Package placement Inspection and repair Lead-free soldering versus PbSn soldering
18.3 Wave soldering
Key characteristics in wave soldering are:
* Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are exposed to the wave
* Solder bath specifications, including temperature and impurities
TEF6730A_1 (c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 21 February 2007
52 of 58
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
18.4 Reflow soldering
Key characteristics in reflow soldering are:
* Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 32) than a PbSn process, thus reducing the process window
* Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
* Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). In addition, the peak temperature must be low enough that the packages and/or boards are not damaged. The peak temperature of the package depends on package thickness and volume and is classified in accordance with Table 41 and 42
Table 41. SnPb eutectic process (from J-STD-020C) Package reflow temperature (C) Volume (mm3) < 350 < 2.5 2.5 Table 42. 235 220 Lead-free process (from J-STD-020C) Package reflow temperature (C) Volume (mm3) < 350 < 1.6 1.6 to 2.5 > 2.5 260 260 250 350 to 2000 260 250 245 > 2000 260 245 245 350 220 220
Package thickness (mm)
Package thickness (mm)
Moisture sensitivity precautions, as indicated on the packing, must be respected at all times. Studies have shown that small packages reach higher temperatures during reflow soldering, see Figure 32.
TEF6730A_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 21 February 2007
53 of 58
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
temperature
maximum peak temperature = MSL limit, damage level
minimum peak temperature = minimum soldering temperature
peak temperature
time
001aac844
MSL: Moisture Sensitivity Level
Fig 32. Temperature profiles for large and small components
For further information on temperature profiles, refer to Application Note AN10365 "Surface mount reflow soldering description".
TEF6730A_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 21 February 2007
54 of 58
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
19. Footprint for soldering
13.650 (2 x) 12.200 (2 x) 10.400 (4 x) 9.035 (4 x) 7.900 (4 x)
0.1425 (8 x) 0.400 (3 x) 0.285 (8 x)
4.700 (2 x) 4.800 (2 x) 0.400 (3 x) 0.500
0.285 (56 x)
10.250 (2 x) solder land 12.400 (2 x)
solder paste deposit
solder land plus solder paste
placement area
occupied area Dimensions in mm SOT855-1
Fig 33. Footprint
TEF6730A_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 21 February 2007
55 of 58
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
20. Abbreviations
Table 43. Acronym ADC AF AFU AGC DAA DSP DX HD IF LNA LO LSB LW MSB MW PIN PLL RF SCL SDA SW VCO WB Abbreviations Description Analog-to-Digital Converter Alternative Frequency Alternative Frequency Updating Automatic Gain Control Digital Auto Alignment Digital Signal Processor Distance High Definition Intermediate Frequency Low Noise Amplifier Local Oscillator Least Significant Bit Long Wave Most Significant Bit Medium Wave Positive Intrinsic Negative Phase-Locked Loop Radio Frequency Serial Clock Serial Data Short Wave Voltage-Controlled Oscillator Weather Band
21. Revision history
Table 44. Revision history Release date 20070221 Data sheet status Product data sheet Change notice Supersedes Document ID TEF6730A_1
TEF6730A_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 21 February 2007
56 of 58
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
22. Legal information
22.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
22.2 Definitions
Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.
result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
22.3 Disclaimers
General -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a NXP Semiconductors product can reasonably be expected to
22.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. I2C-bus -- logo is a trademark of NXP B.V.
23. Contact information
For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: salesaddresses@nxp.com
TEF6730A_1
(c) NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 -- 21 February 2007
57 of 58
NXP Semiconductors
TEF6730A
Front-end for digital-IF car radio
24. Contents
1 2 3 4 5 6 6.1 6.2 7 7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 7.9 8 8.1 8.1.1 8.1.2 8.2 8.2.1 8.2.2 8.2.3 8.2.4 8.2.5 8.2.6 8.2.7 8.2.7.1 8.2.8 9 10 11 12 13 14 15 16 17 18 18.1 18.2 18.3 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 4 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 6 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6 Functional description . . . . . . . . . . . . . . . . . . . 8 FM mixer 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 FM RF AGC . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Antenna DAA1 and DAA2. . . . . . . . . . . . . . . . . 8 AM LNA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 AM RF AGC . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 AM mixer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 VCO and dividers . . . . . . . . . . . . . . . . . . . . . . . 9 Tuning PLL . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 AM/FM IF AGC amplifier. . . . . . . . . . . . . . . . . . 9 2C-bus protocol . . . . . . . . . . . . . . . . . . . . . . . . . 9 I Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Read mode: data byte TUNER . . . . . . . . . . . . 10 Read mode: data byte ID . . . . . . . . . . . . . . . . 11 Write mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Mode and subaddress byte for write. . . . . . . . 16 Write mode: data byte CONTROL . . . . . . . . . 22 Write mode: data byte PLLM . . . . . . . . . . . . . 23 Write mode: data byte PLLL . . . . . . . . . . . . . . 23 Write mode: data byte DAA . . . . . . . . . . . . . . 23 Write mode: data byte AGC . . . . . . . . . . . . . . 24 Write mode: data byte BAND . . . . . . . . . . . . . 25 Tuning overview . . . . . . . . . . . . . . . . . . . . . . . 26 Write mode: data byte TEST . . . . . . . . . . . . . 26 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 27 Thermal characteristics. . . . . . . . . . . . . . . . . . 27 Static characteristics. . . . . . . . . . . . . . . . . . . . 28 Dynamic characteristics . . . . . . . . . . . . . . . . . 29 I2C-bus characteristics . . . . . . . . . . . . . . . . . . 41 Overall system parameters . . . . . . . . . . . . . . . 43 Application information. . . . . . . . . . . . . . . . . . 45 Test information . . . . . . . . . . . . . . . . . . . . . . . . 48 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 51 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Introduction to soldering . . . . . . . . . . . . . . . . . 52 Wave and reflow soldering . . . . . . . . . . . . . . . 52 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 52 18.4 19 20 21 22 22.1 22.2 22.3 22.4 23 24 Reflow soldering. . . . . . . . . . . . . . . . . . . . . . . Footprint for soldering . . . . . . . . . . . . . . . . . . Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . Revision history . . . . . . . . . . . . . . . . . . . . . . . Legal information . . . . . . . . . . . . . . . . . . . . . . Data sheet status . . . . . . . . . . . . . . . . . . . . . . Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . Contact information . . . . . . . . . . . . . . . . . . . . Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 55 56 56 57 57 57 57 57 57 58
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'.
(c) NXP B.V. 2007.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 21 February 2007 Document identifier: TEF6730A_1

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